Subject: EEPro100 NICs and EBSA285.

From: Mathias Teikari <[email-masked]>
Date: Tue, 11 Jul 2000 10:48:00 +0200

Hi all,

Has anybody had a working EBSA-285 setup with Intel's EEPro100 NICs?

I am using a 2.2.15 kernel patched with patch-2.2.15-rmk1 (because I
need a 2.2 kernel at this point) and ebsa285-bios-1.06 w. diff2
patch.
The eepro100 driver is compiled into the kernel because I want to
mount an NFS root fs.

Now, the problem.. The cards won't initialise properly, or at least
that is what the kernel thinks.

...
POSIX conformance testing by UNIFIX
PCI: Probing PCI hardware
pci_scan_bus for bus 0
PCI: 00:38 [8086/1229]
PCI: pci_scan_bus returning with max=00
Linux NET4.0 for Linux 2.2
Based upon Swansea University Computer Society NET3.039
NET4: Unix domain sockets 1.0 for Linux NET4.0.
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP
TCP: Hash tables configured (ehash 16384 bhash 16384)
Starting kswapd v 1.5
RAM disk driver initialized:  1 RAM disks of 4096K size
Found Intel i82557 PCI Speedo at I/O 0xe1800000, IRQ 22.
  PCI latency timer (CFLT) is 0x20.
eepro100.c:v1.09j-t 9/29/99 Donald Becker
http://cesdis.gsfc.nasa.gov/linux/drivers
/eepro100.html
eepro100.c: $Revision: 1.20.2.3 $ 2000/03/02 Modified by Andrey V.
Savochkin <saw@sa
w.sw.com.sg> and others
eth0: Intel PCI EtherExpress Pro100 at 0xe1800000,
00:90:27:8C:D8:6B, IRQ 22.
  Receiver lock-up bug exists -- enabling work-around.
  Board assembly 721383-006, Physical connectors present: RJ45
  Primary interface chip i82555 PHY #1.
Self test failed, status ffffffff:
 Failure to initialize the i82557.
 Verify that the card is in a bus-master capable slot.
...

I know that the hardware is OK because it's running when using
another OS (in house developed mini-OS).

A thought that crossed my mind is address mapping problems
(PCI-SDRAM et vice-versa) or some other setup of the CSRs.

Any suggestions?

Thanks,
    Mathias

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---

From: Peter Naulls <[email-masked]>
Date: Tue, 11 Jul 2000 11:53:49 +0100

In message <[email-masked]>

> (PCI-SDRAM et vice-versa) or some other setup of the CSRs.

Mostly likely yes - it seems it's not finding some of its initial
resources.  There are a couple of compile options in this driver
you might want to take a look at; and certainly the initilisation
code - it's relatively simple.

Peter

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---

From: Jacob Strauss <[email-masked]>
Date: 12 Jul 2000 14:31:48 -0400

This seems to be the same problem I'm having.  
Does anyone with a working ebsa-285 setup have it
working on the newer revision of the board
(Intel rather than Dec names, 21285-AB rather than
21285-AA)

-Jacob

---

From: Nicolas Pitre <[email-masked]>
Date: Wed, 12 Jul 2000 15:51:57 -0400 (EDT)

You need to add all the cache coherency handling into the driver for it to
work properly with ARM processors.

If you'd use a 2.4.x kernel, everything is already done for you.

---

From: Jacob Strauss <[email-masked]>
Date: 12 Jul 2000 16:04:14 -0400

Yes, I've been using 2.4.0-test3-pre7-rmk1, with the both 3c905c and
eepro100, and tried turning the dcache off (nocache_setup in mm-armv.c)
with no changes.  So I think that ought to rule out cache problems.

-Jacob