Subject: Mapping between Coprocessor interface and architecture. (proc-arm6,7.S)

From: S A McConnell <[email-masked]>
Date: Mon, 06 Mar 2000 15:59:40 -0600

Not being an expert on ARM cpu's and architectures can someone tell me
if the coprocessor interface (p15) is part of the CPU (ARM6, ARM7)or
part of the architecture (v3, v4, v4T)?

Which of the two forms below should be used

ENTRY(cpu_arm6_reset)
ENTRY(cpu_arm7_reset)
  mov r0, #0
  mcr p15, 0, r0, c7, c0, 0  @ flush cache
#ifdef CONFIG_CPU_32v4
  mcr p15, 0, r0, c8, c7, 0  @ flush TLB (v4)
#else
  mcr p15, 0, r0, c5, c0, 0  @ flush TLB (v3)
#endif
@  mcr p15, 0, r0, c5, c0, 0  @ flush TLB
  mov pc, lr

---------------------------------------
ENTRY(cpu_arm720T_reset)
  mov r0, #0
  mcr p15, 0, r0, c7, c0, 0  @ flush cache
  mcr p15, 0, r0, c8, c7, 0  @ flush TLB (v4)
  mov pc, lr

Thanks,

Soctt

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From: Philip Blundell <[email-masked]>
Date: Tue, 07 Mar 2000 09:52:25 +0000

>part of the architecture (v3, v4, v4T)?

It's part of the architecture.  You may find that ARM720T has more in common 
with SA-1 than ARM710.

>Which of the two forms below should be used

This one.  I'd rather CONFIG_CPU32v4 didn't get involved in this sort of thing 
- it only exists to help choose compiler flags.

p.

---

From: Russell King - ARM Linux Admin <[email-masked]>
Date: Tue, 7 Mar 2000 07:11:46 +0000 (GMT)

> part of the architecture (v3, v4, v4T)?

Yes it is.

>   mcr p15, 0, r0, c8, c7, 0  @ flush TLB (v4)

This one.
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