Subject: 2.3.39 head-armv.S (__create_page_tables)

From: S A McConnell <[email-masked]>
Date: Mon, 21 Feb 2000 11:39:33 -0600

Hello,

Can anyone shed some light on the __create_page_tables  block included
below.  Thanks for you help in advance.

Scott McConnell

Does it make sense to port Linux to a diskless system? What type of
porting effort is involved?

I am having trouble understanding
what this section is trying to accomplish. I have TEXTADDR defined as
D8000. The first two stores
appear to be writing the same value to the same address. I assume '<<'
means shift left and '>>' means
shift right.

 I assume TEXTADDR is the base address of executable code? Why the
0x8000 test at the start of this code?

What advice is available for mapping physical to virtual addresses?

 /*
   * Create identity mapping for first MB of kernel.            @
Identity mapping???????????
   * map in four sections (4MB) for kernel.
   * these are marked cacheable and bufferable.
   *
   * The identity mapping will be removed by  paging_init()
   *
   * r4 = start of page table
   * r5 = physical address of start of RAM
   * r6 = physical IO address
   * r7 = byte offset into page tables for IO
   * r8 = page table flags
   */

  mov r3, #0x0c
  orr r3, r3, r8
  add r3, r3, r5                                @ Adjusted flags + start
of RAM ?????????????
  add r0, r4, r5, lsr #18
  str r3, [r0]
  add r0, r4, #(TEXTADDR - 0x8000) >> 18  @???????????????
  str r3, [r0], #4
  add r3, r3, #1 << 20
  str r3, [r0], #4
  add r3, r3, #1 << 20
  str r3, [r0], #4
  add r3, r3, #1 << 20
  str r3, [r0], #4
#ifdef CONFIG_DEBUG_LL
  /*
   * Map in IO space for serial debugging.
   * This allows debug messages to be output
   * via a serial port before paging_init.
   */
  add r0, r4, r7
  rsb r3, r7, #0x4000 @ PTRS_PER_PGD*sizeof(long)
  cmp r3, #0x0800
  addge r2, r0, #0x0800
  addlt r2, r0, r3
  orr r3, r6, r8
1:  str r3, [r0], #4
  add r3, r3, #1 << 20
  teq r0, r2
  bne 1b

Cann anyone exlains the parts I have marked for the following code:

What is __bss_start??????????

__ret:  ldr lr, __switch_data

  mcr p15, 0, r0, c1, c0                               @ Write the
control register.
  mov r0, r0                                                 @ What do
these 3 mov's do??????????????
  mov r0, r0
  mov r0, r0
  mov pc, lr

  /*
   * This code follows on after the page
   * table switch and jump above.
   *
   * r0  = processor control register
   * r1  = machine ID
   * r9  = processor ID
   */
  .align 5
__mmap_switched:
  adr r3, __switch_data + 4
  ldmia r3, {r4, r5, r6, r7, r8, sp} @ Setup stack

  mov fp, #0    @ Clear BSS
1:  cmp r4, r5
  strcc fp, [r4],#4
  bcc 1b

  str r9, [r6]   @ Save processor ID
  str r1, [r7]   @ Save machine type
#ifdef CONFIG_ALIGNMENT_TRAP
  orr r0, r0, #2   @ ...........A.                            @ What is
the A bit????????
#endif
  bic r2, r0, #2   @ Clear 'A' bit
  stmia r8, {r0, r2}   @ Save control register values

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---

From: Russell King - ARM Linux Admin <[email-masked]>
Date: Mon, 21 Feb 2000 23:01:30 +0000 (GMT)

> below.  Thanks for you help in advance.

Certainly.

> porting effort is involved?

Yes.  Normally zero effort is required if your system is already supported
by the kernel.  What system do you have?

> I am having trouble understanding what this section is trying to
> accomplish. I have TEXTADDR defined as D8000. The first two stores
> means shift left and '>>' means shift right.
> 

Hmm, have you had any experience with ARM assembly programming?  I'd like
to know this so that I can pitch my reply appropriately.

Thanks.
   _____
  |_____| ------------------------------------------------- ---+---+-
  |   |        Russell King       [email-masked]      --- ---
  | | | |  http://www.arm.linux.org.uk/~rmk/armlinux.html    /  /  |
  | +-+-+                                                     --- -+-
  /   |               THE developer of ARM Linux              |+| /|\
 /  | | |                                                     ---  |
    +-+-+ -------------------------------------------------  /\\\  |

---

From: Erik Mouw <[email-masked]>
Date: Mon, 21 Feb 2000 23:55:54 +0100 (MET)

> porting effort is involved?

It makes sense, it has already been done. Almost all SA1100 ports are
diskless. Check out Nicolas Pitre's SA1100 patches at:

  ftp://ftp.netwinder.org/users/n/nico/

Erik

-- 
J.A.K. (Erik) Mouw, Information and Communication Theory Group, Department
of Electrical Engineering, Faculty of Information Technology and Systems,
Delft University of Technology, PO BOX 5031,  2600 GA Delft, The Netherlands
Phone: +31-15-2785859  Fax: +31-15-2781843  Email [email-masked]
WWW: http://www-ict.its.tudelft.nl/~erik/

---

From: S A McConnell <[email-masked]>
Date: Fri, 25 Feb 2000 14:22:32 -0600

> to know this so that I can pitch my reply appropriately.

I am a newbie that is rapidly coming up to speed. I have all the documentation
for ARM. Our target is not one of the currently supported targets but it is in
the ARM7 family. Which  architecture should I study? I am still looking for some
information on the code that I included in my last message.

Thanks,
Scott