Subject: Micro-Kernel thesis

From: "Adam 'WeirdArms' Wiggins" <[email-masked]>
Date: Tue, 2 Nov 1999 13:31:10 +1100 (EST)

For those interested in micro-kernels, my thesis on porting L4 to
the StrongARM is now avaliable from anonymous ftp at
ftp://ftp.cse.unsw.edu.au/pub/users/awiggins/thesis.ps
the first pre-alpha release of the kernel will be in the same directory in
the next day or so.

	Cheers Adam

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From: Dave Baukus <[email-masked]>
Date: Thu, 11 Nov 1999 08:54:49 -0600

I have an EBSA-like board; for this question its major difference is
that it has a 55 Mhz clock.

I know this affects the serial port baud rate calculation.  I've also 
seen the following in asm-arch/arch-ebsa285/timex.h:

/*
 * On EBSA285 boards, the clock runs at 50MHz and is
 * divided by a 4-bit prescaler.  Other boards use an
 * ISA derived timer, and this is unused.
 */
#define CLOCK_TICK_RATE         (50000000 / 16)

The question is are there other areas I need to look at to compensate for
the different clock ?

thanks

--
[email-masked]			
	Inet Technologies Inc.
	Plano, Texas, USA.

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From: Philip Blundell <[email-masked]>
Date: Thu, 11 Nov 1999 15:31:25 +0000

>The question is are there other areas I need to look at to compensate for

No.  The bus clock is pretty much transparent to software.  I guess the only 
thing to watch out for is drivers that assume knowledge of the PCI clock 
frequency.

p.