Subject: Re: new UNSW CSE technical report (fwd)

From: <[email-masked]>
Date: Wed, 4 Aug 1999 07:08:58 -0500 (CDT)

Hi,

Is anyone interested in applying the approach talked about in the paper
to the Linux/ARM kernel?  I would like to work on this task, and didn't
want to duplicate any efforts underway.  Any feedback appreciated!
Thanks!

--
Kyle Mestery			| StorageTek's Storage Networking Group
[email-masked]		| http://www.freebsd.org/
[email-masked]		| http://www.netwinder.org/
	Protect your right to privacy: www.freecrypto.org

On Fri, 30 Jul 1999, Adam 'WeirdArms' Wiggins wrote:

> 
> 	For those of you interested.
> 
> ---------- Forwarded message ----------
> Date: Fri, 30 Jul 1999 15:55:28 +1000 (EST)
> From: Andrew Taylor <[email-masked]>
> To: [email-masked]
> Subject: new UNSW CSE technical report
> 
> 
> UNSW Computer Science and Engineering Technical Report no. UNSW-CSE-TR-9906
> (20 pages: compressed postscript file 9906.ps.Z)
> 
> Title:   Fast Address-Space Switching on the StrongARM SA-1100 Processor
> 
> 
> Authors: Adam Wiggins, Gernot Heiser
>          School of Computer Science and Engineering 
>          University of New South Wales
>          Sydney 2052 Australia
> 	 E-mail: {awiggins,[email-masked]
> 
> 
> 
> Abstract:
> 
> The StrongARM SA-1100 is a high-speed low-power processor aimed at
> embedded and portable applications. Its architecture features virtual
> caches and TLBs which are not tagged by an address-space
> identifier. Consequently, context switches on that processor are
> potentially very expensive, as they may require complete flushes of TLBs
> and caches.
> 
> This report presents the design of an address-space management technique
> for the StrongARM which minimises TLB and cache flushes and thus
> context switching costs. The basic idea is to implement the top-level of
> the (hardware-walked) page-table as a cache for page directory entries
> for different address spaces. This allows switching address spaces with
> minimal overhead as long as the working sets do not overlap. For small
> (<=32MB) address spaces further improvements are possible by
> making use of the StrongARM's re-mapping facility. Our technique is
> discussed in the context of the L4 microkernel in which it will be
> implemented.
> 
> 
> ftp://ftp.cse.unsw.edu.au/pub/doc/papers/UNSW/9906.ps.Z
> 
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> 

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