Subject: SMP StrongARM systems?

From: "B. James Phillippe" <[email-masked]>
Date: Sat, 24 Apr 1999 01:39:02 -0700 (PDT)

Hello,

I'm a total ARM-newbie.  I read through the website and the FAQ but I
didn't see any mention of the existance of such a system.  The arm code in
2.2.6 doesn't seem to contain any support for SMP, so I assume there are no
SMP StrongARM systems (or that if there were, they would not work with
Linux)....?

thanks,
-bp
--
B. James Phillippe		. [email-masked]
Software Engineer, WGT Inc.	. http://www.terran.org/~bryan

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From: Matthew Wilcox <[email-masked]>
Date: Sat, 24 Apr 1999 12:39:12 +0200

> SMP StrongARM systems (or that if there were, they would not work with

The StrongARM has a broken SWP implementation which means there is no
test-and-set instruction which is atomic to (cachable) memory.  This makes
it somewhat difficult to make an SMP implementation.  I was wondering
though... how about having an ELF section where all the spinlocks are
placed which is relocated into a non-cached region of memory?  Or are
spinlocks part of structs these days?

-- 
Matthew Wilcox <[email-masked]>
"Windows and MacOS are products, contrived by engineers in the service of
specific companies. Unix, by contrast, is not so much a product as it is a
painstakingly compiled oral history of the hacker subculture." - N Stephenson
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From: Alan Cox <[email-masked]>
Date: Sat, 24 Apr 1999 12:19:21 +0100 (BST)

> spinlocks part of structs these days?

The strong arm has both the lock bugs and the cache flush bugs. The
combination would make SMP suck badly I suspect

Collecting locks into an ELF section would be fun as some are dynamically
allocated - but since the field in the struct could notionally be a 
pointer to an object elsewhere not impossible

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From: "Adam 'WeirdArms' Wiggins" <[email-masked]>
Date: Sat, 24 Apr 1999 22:24:12 +1000 (EST)

> combination would make SMP suck badly I suspect

	What are these bugs and where are they outlined? Also what chips
are effected (ie SA-110, SA-1100, SA-1110?)? Are the fixes in newer
steppings?

	Cheers Adam

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From: Alan Cox <[email-masked]>
Date: Sat, 24 Apr 1999 14:01:12 +0100 (BST)

> are effected (ie SA-110, SA-1100, SA-1110?)? Are the fixes in newer

In the StrongARM manual - differences from the ARM architecture bit.

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From: Philip Blundell <[email-masked]>
Date: Sat, 24 Apr 1999 16:15:35 +0100

>are effected (ie SA-110, SA-1100, SA-1110?)? Are the fixes in newer

"Bugs" isn't really the right word -- the chip was deliberately designed to 
work like this.  They're documented in the StrongARM manual and all SA-1 parts 
are affected.

p.