Subject: StrongARM cards in RiscPC

From: Nicholas Clark <[email-masked]>
Date: Fri, 12 Mar 1999 18:14:40 +0000 (GMT)

My current source tree is linux 2.2.2 + rmk5 + linux-2.2.2-philb-990301

It appears that philb changes arch/arm/mm/proc-sa110.S and associated files
which removes references to DOM_KERNELDOMAIN (from ../lib/genconsdata.c).

However, I don't understand what the sa110 changes are in order to propagate
them into proc-arm6,7.S, and remove the offending:

		teq	r0, #0
		moveq	r0, #DOM_KERNELDOMAIN
		movne	r0, #DOM_USERDOMAIN

However, I'm not sure why I need to get the MMU stuff for an ARM7 when I have
a StrongARM in my RiscPC. I suspect that really the config stuff needs to
ask three questions:

What architecture are you compiling for?		[RiscPC here]
What is the minimum CPU required to run?	[eg ARM6 or StrongARM]
Tune for which CPU?

For a distribution kernel you'd answer RiscPC,ARM6,StrongARM on the assumption
that most people have StrongARMs, but some only have ARM6, so you'd like it to
run on everything, but run fastest on StrongARM.

And when I build my personal kernel I'd like to say RiscPC,StrongARM,StrongARM
and get 64 bit multiplies, sign extending byte loads and other StrongARM
instructions, with arch/arm/Makefile clever enough to realise that it'll
have to tell gcc to prevent generation of LDRH and STRH.
Currently it seems that both PhilB and Russell's work arounds to cope with
*****y Acorn's card basically generate ARM7 kernels. Am I missing much
performance not getting the armv4 instructions?

(Can gcc already do -march=armv4 with another -m to stop LDRH/STRH?)

Is this an optimal way of doing things? Or have I missed something?

Nick
unsubscribe: body of `unsubscribe linux-arm' to [email-masked]

---

From: Chris Rutter <[email-masked]>
Date: Sat, 13 Mar 1999 12:12:50 +0000 (GMT)

> run on everything, but run fastest on StrongARM.

This would be equivalent to compiling with

  -march=armv3l -mtune=strongarm110

and is feasible now.

> have to tell gcc to prevent generation of LDRH and STRH.

There's no way, AFAICS, of turning off and on LDRH/STRH separately from
the rest of the v4 instruction set: look in `egcs/gcc/config/arm/arm.h'.

There *are* these two options:

  {"short-load-words",         -ARM_FLAG_SHORT_BYTE},   \
  {"no-short-load-words",       ARM_FLAG_SHORT_BYTE},   \

but I suspect they do something else?

> performance not getting the armv4 instructions?

You're right; unless you specify `--with-cpu', or your machine name 
begins with `armv2' (see `egcs/configure.in'), the target CPU is simply
set to `generic', which if you look in egcs/gcc/config/arm/arm.h is 
currently a synonym for ARM610.

I don't think you're missing much performance, no.  I don't believe gcc
can use (`open code'?) most of the v4-over-v3 improvments.

> (Can gcc already do -march=armv4 with another -m to stop LDRH/STRH?)

See above.

> Is this an optimal way of doing things? Or have I missed something?

Patch arm.[ch].

-- 
Chris <[email-masked]>                         ( http://www.fluff.org/chris )