Subject: Illegal instruction in timer1_interupt ?

From: Dave Baukus <[email-masked]>
Date: Fri, 29 Jan 1999 15:56:53 -0600

Anybody see this problem before ?
I get an invalid instruction in what appears to be timer1_interupt().

I'm running 2.2.0 w/ the  pre-patch-2.2.0-final-19990123-3 patch
on and ebsa285 (not Coprocessor). 

Any clues appreciated

The stack trace is basically:
	timer1_interupt
	do_IRQ

Internal error: Oops - undefined instruction: c00e5f94
CPU: 0
pc : [<c001307c>]    lr : [<c0015864>]
sp : c00e5f4c  ip : c00e5f64  fp : c00e5f60
r10: fc012000  r9 : c00f1bbc  r8 : c00f1bfc
r7 : 00000000  r6 : 00000000  r5 : 00000002  r4 : c00e5f94
r3 : fe00030c  r2 : c00e5f94  r1 : 00000000  r0 : 00000002
Flags: nZCv  IRQs on  FIQs off  Mode SVC_32  Segment kernel
Control: 4171  Table: 00004171  DAC: 0000001F
Process swapper (pid: 0, stackpage=c00e5000)
Stack: 
c00e5f20:                                                                
c0015864 
c00e5f40: c001307c 60000053 ffffffff c0013124  00000002 c00e5f90 c00e5f64
c0015864 
c00e5f60: c0013064 00000040 c00e5f94 fe000000  c00e5fdc 00000010 c0008720
80000053 
c00e5f80: ffffffff c00e5ffc c00e5f94 c0014a80  c0015798 c0138bf0 00000060
00000000 
c00e5fa0: 80000053 c0101e7c c00e76c4 c0101df0  c00e76c8 c00e7904 000ffff8
fc012000 
c00e5fc0: c00e5ffc c00f707c c00e5fdc c0008b40  c0008720 80000053 ffffffff
c00e79a4 
c00e5fe0: c0101e7c c010d904 c0101df0 c010d904  00000000 c00e6000 c00083e0
c0008a2c 
Backtrace: 
Function entered at [<c0013058>] from [<c0015864>]
  r5 = 00000002
  r4 = c0013124
Function entered at [<c001578c>] from [<c0014a80>]
  r9 = ffffffff
  r8 = 80000053
  r7 = c0008720
  r6 = 00000010
  r5 = c00e5fdc
  r4 = fe000000
Function entered at [<c0008a20>] from [<c00083e0>]
  r7 = c010d904
  r6 = c0101df0
  r5 = c010d904
  r4 = c0101e7c
Code: e1a04002 ec005574 (e1a00004) eb00300e e59f3074 
Aiee, killing interrupt handler
Kernel panic: Attempted to kill the idle task!
In swapper task - not syncing

--
Dave Baukus
	Inet Inc. - R & D
	[email-masked]
	(972) 578 - 3930
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From: Russell King - ARM Linux Admin <[email-masked]>
Date: Fri, 29 Jan 1999 22:12:26 +0000 (GMT)

Dave Baukus writes:
>...

This works out to be:

00000000 e1a04002       mov     r4, r2
00000004 ec005574       stc     5, cr5, [r0], -#1d0
00000008 e1a00004       mov     r0, r4
0000000c eb00300e       bl      0000c04c

Looks to me as if it's a compiler bug.  This routine should not contain
'stc' instructions.  What does the vmlinux' disassembly indicate for
timer1_interrupt?
   _____
  |_____| ------------------------------------------------- ---+---+-
  |   |        Russell King       [email-masked]      --- ---
  | | | |  http://www.arm.linux.org.uk/~rmk/armlinux.html    /  /  |
  | +-+-+                                                     --- -+-
  /   |               THE developer of ARM Linux              |+| /|\
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From: Philip Blundell <[email-masked]>
Date: Fri, 29 Jan 1999 23:58:23 +0000

>'stc' instructions.  What does the vmlinux' disassembly indicate for

It might be an assembler problem; reloc for a `bl' overflowing into the opcode 
field.  I've seen that kind of thing before. 

If you can compare the disassembly of vmlinux with the disassembly of the 
specific .o file containing that routine, it would be a big clue.

p.

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From: Philip Blundell <[email-masked]>
Date: Sat, 30 Jan 1999 00:00:08 +0000

>Any clues appreciated

Do you have CONFIG_TEXT_SECTIONS turned on?  If so try with it off.

p.