Subject: Re: Re" memory mapping

From: Philip Blundell <[email-masked]>
Date: Thu, 03 Sep 1998 15:59:10 +0100

>That is the preformance penalty i would have when i have to use the DMA
>channel. The messages would have to be in the hosts memory.

Why couldn't you use the DMA channel to write between StrongARM processors?  
PCI works a lot better if you can arrange to have your data pushed rather than 
pulled, as it were.

>I was thinking about making it bufferable. This would mean i still get
>burst writes.

Yup, that's true.  It's still better to make it cacheable as well if you can 
because that way you get write merging as well.

>And arch/arm/kernel/head-armv.S to do the intial page mapping ?

Yup, and obviously arch/arm/Makefile so that the linker did the right thing.  
That's about it I think.

p.

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From: Mark van Doesburg <[email-masked]>
Date: Thu, 3 Sep 1998 17:09:09 +0200

Indeed, and that can take quite a long time.  PCI reads are a
	slow business.

	If you can guarantee never to read from that area then it can be
	a win to map it cacheable so that you take advantage of burst
	writes.  The 21285 data sheet does admittedly say that you
	mustn't do this but I'm not sure whether it really means it.

I was thinking about making it bufferable. This would mean i still get
burst writes. And when a message is in remote memory it would use the
burst write to first flush the write buffer since i have to read from
the PCI memory to flush the outbound PCI fifo.

	There are some definitions in include/asm-arm/proc-armv that
	would need to be changed (probably the best thing would be to
	push them into an arch/ include) but that's about it.

This doesn't seem like a lot of work.

	p.

Mark.