Subject: Re: new patch

From: Philip Blundell <[email-masked]>
Date: Tue, 30 Dec 1997 14:50:34 +0000

>Hmm... I may be able to shed some light here.  I finally got a prerelease
>of gcc 2.8 installed, recompiled it with itself, everything seemed great,
>examined some of the assembler produced and it was significantly better.
>Recompiled my kernel with it and now it hangs after it prints `Now
>booting kernel'.  Naturally I have a backup kernel for this eventuality ;-)
>
>Perhaps this patch fixes this.  I'm going to try it out.

The gcc 2.8 prerelease sometimes has problems with `short' values that aren't 
on 32-bit boundaries.  To work around this you need to add 
`-mshort-load-bytes' to your compiler options.  I'd be surprised if this was 
causing your hangs though.

I'm not aware of anything my patch changed that would fix your problems, 
I'm afraid.  I've had kernels compiled with the new gcc working on my A5000 
but I don't have a RiscPC to test on.

p.

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From: Philip Blundell <[email-masked]>
Date: Wed, 31 Dec 1997 21:18:58 +0000

>Well, applying your patch /does/ stop it hanging.  It now gets as far as
>inserting the FPemulator then:

Ah, that might be the "#ifdef __arm6__" problem, actually.

>I'll try the short-load-bytes option.  that sounds like a plausible idea.

Yes.  Dave and I are discussing with the rest of the GCC people what to do 
about it in the long term.

p.

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From: Matthew Wilcox <[email-masked]>
Date: Wed, 31 Dec 1997 19:52:34 +0000 (GMT)

rc.sysinit: memory violation at pc=0x03fffda8, lr=0xbffffd14
   (bad address = 0x03fffda8, code 3)
rc.sysinit: memory violation at pc=0x03fffd4c, lr=0x6000pcc8
   (bad address = 0x03fffd4c, code 3)
init: memory violation at pc=0x03fffb9c, lr=0xbffffb38
   (bad address = 0x03fffb9c, code 3)
INIT: PANIC: Segmentation violation!  giving up..

I'll try the short-load-bytes option.  that sounds like a plausible idea.
unsubscribe: body of `unsubscribe linux-arm' to [email-masked]

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From: Russell King - ARM Linux Admin <[email-masked]>
Date: Tue, 30 Dec 1997 23:52:39 +0000 (GMT)

BTW, for those of you using the new GCC, something that has been discovered
by Dave Gilbert:

 When compiling the kernel, turn off some of the optimisations, specifically
 the one that allows GCC/EGCS to assume that all structures are word aligned.
 GCC will try to load a short using a LDR with a shift.  EG, to access bytes
 12 and 13 only of a structure, GCC will use by default:
   ldr r0, [r1, #14]
   mov r0, r0, lsr #16

 This means that if r1 isn't word aligned (it certainly isn't for IP ethernet
 packets in this case), the LDR picks up the wrong data.

Does anyone know if this is a legal optimisation that the compiler is making?

BTW, don't say that it should be word aligned.  If that structure was word
aligned, then the IP structures won't be, which will be even worse.  Blame
Xerox for that one!
   _____
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