Subject: CL-PS7500FE half-merged?

From: Jason Gunthorpe <[email-masked]>
Date: Mon, 29 May 2000 21:30:38 -0600 (MDT)

Hi All!

I've read a bunch of messages on this list about this Cirrus board, seems
to be quite popular. Everything I've read seems to indicate that full
support for this board is in the standard ARM kernel. But..

At least with this kernel here, the CONFIG_ARCH_CLPS7500 define isn't
actually settable, seems to be omitted from the config scripts and some
key make file parts too.

Specifically, I have added this to arm/config.in:

@@ -21,6 +21,7 @@
         A5000                  CONFIG_ARCH_A5K \
         RiscPC                 CONFIG_ARCH_RPC \
         EBSA-110               CONFIG_ARCH_EBSA110 \
+        Cirrus-CL-PS7500FE     CONFIG_ARCH_CLPS7500 \
         FootBridge-based       CONFIG_FOOTBRIDGE" RiscPC
 # the following are placeholders for when they are fully integrated
 #       LinkUp-L7200           CONFIG_ARCH_L7200
@@ -122,6 +123,10 @@
    define_bool CONFIG_CPU_SA1100 y
 fi
 
+if [ "$CONFIG_ARCH_CLPS7500" = "y" ]; then
+   define_bool  CONFIG_CPU_ARM7 y
+fi
+
 #
 #  These machines always have PCI
 #

And I popped this line in arm/kernel/Makefile:

O_OBJS_clps7500   = dma-dummy.o

Now, this is just a guess, it kind of makes sense (almost compiles too ;>) 
but I can't shake the feeling that some important parts are missing? 

Does anyone know what is up here? 

I am using linux-2.3.99-pre8.tar.bz2 and patch-2.3.99-pre8-rmk2.gz for a
kernel.

Also, I was looking at the boot process, and I wonder why the kernel is
linked to run at 0x10008000? What does the 1 in the upper nibble signify?

Finally, has anyone cooked up a patch to run the integrated video
controller?

Thanks,
Jason

unsubscribe: body of `unsubscribe linux-arm-kernel' to [email-masked]

---

From: Russell King - ARM Linux Admin <[email-masked]>
Date: Tue, 30 May 2000 07:40:39 +0100 (BST)

> support for this board is in the standard ARM kernel. But..

Unfortunately, this is because the guy concerned seems to have lost
interest in merging anything.  In fact, I've given up expecting
anything to be merged.  I'll apply your patches as they appear.

> linked to run at 0x10008000? What does the 1 in the upper nibble signify?

Its the base address of the first physical DRAM bank on the RiscPC.
Check the documentation on the CLPS7500 - you may find that the address
of the first physical DRAM bank is the same.
   _____
  |_____| ------------------------------------------------- ---+---+-
  |   |        Russell King       [email-masked]      --- ---
  | | | |            http://www.arm.linux.org.uk/            /  /  |
  | +-+-+                                                     --- -+-
  /   |               THE developer of ARM Linux              |+| /|\
 /  | | |                                                     ---  |
    +-+-+ -------------------------------------------------  /\\\  |

---

From: Jason Gunthorpe <[email-masked]>
Date: Tue, 30 May 2000 08:58:54 -0600 (MDT)

> anything to be merged.  I'll apply your patches as they appear.

Oh. Ok. It would be very helpfull to have anything that was actually once
supposed to work. Did this person ever publish his work in any form at
all?

Can I expect at least that the sections that are surrounded in #ifdef
ARCH_CLPS... are indeed semi-correct?

> of the first physical DRAM bank is the same.

Hm. One of the makefile has an explicit setting for the CLPS and this
address. It didn't make sense when I first studied the documentation, but
I will double check. That might explain why it doesn't manage to get into
the loader decompressor..

Good to know it is not a 'magic' address, thanks.

Jason