From owner-linux-arm-kernel@lists.arm.linux.org.uk  Tue Feb  1 12:32:22 2000
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From: Wookey <wookey@aleph1.co.uk>
Subject: Re: v2.3 kernels on RPC w/ ARM710
To: ARMlinux kernel <linux-arm-kernel@lists.arm.linux.org.uk>
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On Mon 31 Jan, Hanske;Stefan wrote:
> 
> Hi there,
> 
> I've found that the problems with v2.3.xx kernels are more generic than I
> thought. I've tried all v2.3.xx kernels from ftp.armlinux.org/pub/lkab -
> it's still the same as with my home built kernels.
> The kernels are initializing fine, but when init has been started, it is
> terminated with a SIGSEGV and the kernel dies with a register dump.
> 
> Could someone with a RiscPC and ARM[67]10 processor please verify this
> problem?

It doesn't work for me either (ARM710 RPC) but not the same symptoms.

I just tried booting linux-2/3/35-cvs-riscpc-current (13 Jan 2000) using
!linux and it uncompresses ok, then says 'done, booting kernel and the
machine hangs.

I haven't tried compiling my own or any other boot methods yet but will
report back if I find anything useful.

Wookey
-- 
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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Tue Feb  1 14:34:15 2000
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From: "Hanske;Stefan" <sh990154@mail.uni-greifswald.de>
To: Wookey <wookey@aleph1.co.uk>
cc: ARMlinux kernel <linux-arm-kernel@lists.arm.linux.org.uk>
Subject: Re: v2.3 kernels on RPC w/ ARM710
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On Tue, 1 Feb 2000, Wookey wrote:

> On Mon 31 Jan, Hanske;Stefan wrote:
> > 
> > Hi there,
> > 
> > I've found that the problems with v2.3.xx kernels are more generic than I
> > thought. I've tried all v2.3.xx kernels from ftp.armlinux.org/pub/lkab -
> > it's still the same as with my home built kernels.
> > The kernels are initializing fine, but when init has been started, it is
> > terminated with a SIGSEGV and the kernel dies with a register dump.
> > 
> > Could someone with a RiscPC and ARM[67]10 processor please verify this
> > problem?
> 
> It doesn't work for me either (ARM710 RPC) but not the same symptoms.
> 
> I just tried booting linux-2/3/35-cvs-riscpc-current (13 Jan 2000) using
> !linux and it uncompresses ok, then says 'done, booting kernel and the
> machine hangs.
> 
> I haven't tried compiling my own or any other boot methods yet but will
> report back if I find anything useful.

All the other v2.3 versions work (more or less).

As for the register dump...

I've sent it already some day. I'll see if I still find it.


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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Tue Feb  1 17:55:14 2000
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From: Rob Scott <rscott@mtrob.fdns.net>
To: linux-arm-kernel@lists.arm.linux.org.uk
Subject: Status of non-zero physical memory offset kernel?
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I'd like to use 2.3.39 as a starting point for my porting efforts, but
Russell's release note states that it doesn't support architectures with
non-zero phyical memory offsets. Any hope we'll see this fixed soon? If
not, which kernel should I use?

Thanks,
Rob Scott



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From: "Hanske;Stefan" <sh990154@mail.uni-greifswald.de>
To: linux-arm-kernel@lists.arm.linux.org.uk
Subject: Fwd: Kernel compiling problems (fwd)
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---------- Forwarded message ----------
Date: Wed, 2 Feb 2000 01:01:51 +0100 (MET)
From: Stefan Hanske <shanske@gmx.de>
To: sh990154@mail.uni-greifswald.de
Subject: Fwd: Kernel compiling problems

> INIT: version 2.74 booting
> INIT: PANIC: segmentation violation! giving up...
> Unable to handle kernel paging request at virtual address c100052c
> pgd=c04a8000
> *pgd=00000000, *pmd=00000000
> Internal error: Oops: 2
> CPU: 0
> pc: [<c0019254>]        lr: [<c000f7c4>]
> sp:  c0479f98   ip:  bffff98c   fp:  00000000
> r10: 0205b454   r9:  0205b430   r8:  bffff998
> r7:  c0fffc3c   r6:  4d9abb30   r5:  000d0000   r4:  e92dd8f0
> r3:  c0479fd4   r2:  00001d25   r1:  8f000000   r0:  c100052c
> Flags: nZcv   IRQs off   FIQs on   Mode SVC_32   Segment user
> Control: EE133F10   Table: EB003774   DAC: EA00000B
> Process init (pid:1, stackpage=c0479000)
> Stack:
> c0479f80:                   c000f7c4 c0019254 40000093 ffffffff 00000002
> bffff998
> c0479fa0: 00000000 00000008 00000002 bffffa18 00000006 0205b428 bffff998
> 0205b430
> c0479fc0: 0205b454 bffffc00 bffff98c c100052c 02001548 02004408 20000010
> ffffffff
> c0479fe0: C000d6f8 c01f2ccc c01e5a84 c01e5ad0 c0179fe4 c047a000 c0011444
> c000d708
> Backtrace: no frame pointer
> code: 70253d70 0000000a (e5904000) e1a029a4 e2022002

where pc is in "cpu_arm6_data_abort" and lr comes from "dabt_usr"
 
> However, I can boot into a shell via init=/bin/bash at the kernel
> command
> line.
> When I try to execute any program from there by entering it's path/name
> at the
> command line, nothing happens. I can type in characters, but I can't
> stop
> the process (not even via SYSREQ-I or similar).
> I've added some code to fork() and execve() that issue some printk()s at
> different points. The result is that the shell fork()s successfully but
> execve() isn't called.
> Kernels tried: v2.3.19 and up (to 2.3.39-rmk1)
> Binutils: 2.9.1.0.23 (patched with some redhat patches for arm) and
>           2.9.5.0.22 (unpatched)
> gcc: 2.95.2 with patch from ftp.netwinder.org/users/p/philb)
> System: RiscPC with ARM710, various kernel configurations
> Build method: native and cross-compiled
> 
> Has anyone some hints what might me wrong??? Has anybody running
> v2.3.xx-
> kernels on RiscPC with non-SA processor???
> 
> Tia.
> 
> Stefan
-------------------------------------------------------------------
Just because you're paranoid doesn't mean they're not really after 
you!
-------------------------------------------------------------------


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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Tue Feb  8 00:54:37 2000
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From: Deborah Wallach <kerr@pa.dec.com>
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Subject: Itsy schematics and updated Linux software available
Address: Compaq Computer Corporation; Western Research Laboratory; 250 University Avenue; Palo Alto, CA 94301; USA
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In order to promote collaboration and to advance the state of pocket
computing research, Compaq Computer Corporation's Research Laboratories are
making available the schematics and manufacturing information for the Itsy
V1.5 Pocket Computer.  The Itsy is a flexible research platform, based on
the StrongARM 1100, intended to enable hardware and software research in
pocket computing.  It is a small, low-power handheld device with a highly
flexible interface, designed to encourage the development of innovative
research projects, such as novel user interfaces, new applications, power
management techniques, hardware extensions, etc.  The information we are
making available includes the hardware specifications, a low level monitor,
and the Linux source code for the Itsy.

Information about the project is available at: 
www.research.compaq.com/wrl/itsy
More information on the distribution and how to download it is available at:
www.research.compaq.com/wrl/itsy/download.html


			 Deborah Wallach
			 Western Research Laboratory
			 Compaq Computer Corporation

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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Tue Feb  8 20:28:44 2000
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Subject: Re: Fwd: Kernel compiling problems (fwd)
To: sh990154@mail.uni-greifswald.de (Hanske;Stefan)
Date: Tue, 8 Feb 2000 20:10:31 +0000 (GMT)
Cc: linux-arm-kernel@lists.arm.linux.org.uk
In-Reply-To: <Pine.GHP.4.02.10002020153330.2390-100000@mail.uni-greifswald.de> from "Hanske;Stefan" at Feb 02, 2000 01:58:54 AM
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Hanske;Stefan writes:
> > Unable to handle kernel paging request at virtual address c100052c
> > pgd=c04a8000
> > *pgd=00000000, *pmd=00000000
> > Internal error: Oops: 2
> > CPU: 0
> > pc: [<c0019254>]        lr: [<c000f7c4>]
> > sp:  c0479f98   ip:  bffff98c   fp:  00000000
> > r10: 0205b454   r9:  0205b430   r8:  bffff998
> > r7:  c0fffc3c   r6:  4d9abb30   r5:  000d0000   r4:  e92dd8f0
> > r3:  c0479fd4   r2:  00001d25   r1:  8f000000   r0:  c100052c
> > Flags: nZcv   IRQs off   FIQs on   Mode SVC_32   Segment user
> > Control: EE133F10   Table: EB003774   DAC: EA00000B
> > Process init (pid:1, stackpage=c0479000)
> > Stack:
> > c0479f80:                   c000f7c4 c0019254 40000093 ffffffff 00000002
> > bffff998
> > c0479fa0: 00000000 00000008 00000002 bffffa18 00000006 0205b428 bffff998
> > 0205b430
> > c0479fc0: 0205b454 bffffc00 bffff98c c100052c 02001548 02004408 20000010
> > ffffffff
> > c0479fe0: C000d6f8 c01f2ccc c01e5a84 c01e5ad0 c0179fe4 c047a000 c0011444
> > c000d708
> > Backtrace: no frame pointer
> > code: 70253d70 0000000a (e5904000) e1a029a4 e2022002

Ok, found this one!  The following patch should sort this out:

--- linux-orig/arch/arm/mm/proc-arm6,7.S	Mon Dec 27 17:16:05 1999
+++ linux/arch/arm/mm/proc-arm6,7.S	Tue Feb  8 20:09:03 2000
@@ -103,9 +103,9 @@
 		.align
 
 ENTRY(cpu_arm6_data_abort)
-Ldata_simple:
 		ldr	r4, [r0]			@ read instruction causing problem
 		mov	r2, r4, lsr #19			@ r2 b1 = L
+Ldata_simple:
 		and	r2, r2, #2			@ check read/write bit
 		mrc	p15, 0, r0, c6, c0, 0		@ get FAR
 		mrc	p15, 0, r1, c5, c0, 0		@ get FSR

   _____
  |_____| ------------------------------------------------- ---+---+-
  |   |        Russell King       linux@arm.linux.org.uk      --- ---
  | | | |  http://www.arm.linux.org.uk/~rmk/armlinux.html    /  /  |
  | +-+-+                                                     --- -+-
  /   |               THE developer of ARM Linux              |+| /|\
 /  | | |                                                     ---  |
    +-+-+ -------------------------------------------------  /\\\  |

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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Tue Feb 15 06:50:06 2000
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Date: Mon, 14 Feb 2000 22:55:24 -0800 (PST)
From: Rob Scott <rscott@mtrob.fdns.net>
To: linux-arm-kernel@lists.arm.linux.org.uk
Subject: printk in init/main.c
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Hi,

I'm trying to get my first printk(linux_banner) in init/main.c to work. I
can't figure out how console_drivers gets initialized. It's used in the
following fragment from printk (where the actual printing gets done):

if (msg_level < console_loglevel && console_drivers) {
		struct console *c = console_drivers;
		while(c) {
			if ((c->flags & CON_ENABLED) && c->write)
				c->write(c, msg, p - msg + line_feed);
			c = c->next;
		}
	}
	
The printk(linux_banner) is called before console_init in the function 
start_kernel as the following fragment from init/main.c shows:

/*
 * Interrupts are still disabled. Do necessary setups, then
 * enable them
 */
	printk(linux_banner);
	setup_arch(&command_line, &memory_start, &memory_end);
	memory_start = paging_init(memory_start,memory_end);
	trap_init();
	init_IRQ();
	sched_init();
	time_init();
	parse_options(command_line);

	/*
	 * HACK ALERT! This is early. We're enabling the console before
	 * we've done PCI setups etc, and console_init() must be aware of
	 * this. But we do want output early, in case something goes
wrong.
	 */
	memory_start = console_init(memory_start,memory_end);

My guess is that there's some "interesting" compile time behavour that I'm
missing...

Thanks in advance for your help!
Rob Scott



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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Tue Feb 15 16:37:06 2000
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Date: Tue, 15 Feb 2000 11:31:56 -0500 (EST)
From: Nicolas Pitre <nico@CAM.ORG>
To: Rob Scott <rscott@mtrob.fdns.net>
cc: linux-arm-kernel@lists.arm.linux.org.uk
Subject: Re: printk in init/main.c
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On Mon, 14 Feb 2000, Rob Scott wrote:

> 
> Hi,
> 
> I'm trying to get my first printk(linux_banner) in init/main.c to work. I
> can't figure out how console_drivers gets initialized. It's used in the
> following fragment from printk (where the actual printing gets done):
[...]
> The printk(linux_banner) is called before console_init in the function 
> start_kernel as the following fragment from init/main.c shows:
[...]

All printk's before console_init() are stored in a buffer.  The buffer is
purged only when the console is initialized, but your kernel may have
crashed before that point.

You may consider using printascii() and friends.  See
arch/arm/kernel/debug-*.S, or arch/arm/kernel/head_*.s depending on the
version you are using.


Nicolas


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   _____
  |_____| ------------------------------------------------- ---+---+-
  |   |        Russell King       linux@arm.linux.org.uk      --- ---
  | | | |  http://www.arm.linux.org.uk/~rmk/armlinux.html    /  /  |
  | +-+-+                                                     --- -+-
  /   |               THE developer of ARM Linux              |+| /|\
 /  | | |                                                     ---  |
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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Sun Feb 20 22:54:51 2000
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Subject: Re: slow signals?
To: Philip.Blundell@pobox.com (Philip Blundell)
Date: Sun, 20 Feb 2000 22:52:48 +0000 (GMT)
Cc: linux-arm-kernel@lists.arm.linux.org.uk
In-Reply-To: <E12Mf8u-0005Iv-00@kings-cross.london.uk.eu.org> from "Philip Blundell" at Feb 20, 2000 10:47:56 PM
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Philip Blundell writes:
> >> Signal handler overhead seems to be 50% up between 2.3.39 and 2.3.46.
> >> Anybody have any idea what happened?
> >Nothing has changed in the signal handling dept recently in the ARM tree.
> 
> I suppose it's possible I'm suffering some kind of local lossage, though it 
> doesn't seem all that likely.  Do you have any benchmark results for recent 
> kernels?

Nope, haven't benchmarked the kernel this side of the millenium yet.
   _____
  |_____| ------------------------------------------------- ---+---+-
  |   |        Russell King       linux@arm.linux.org.uk      --- ---
  | | | |  http://www.arm.linux.org.uk/~rmk/armlinux.html    /  /  |
  | +-+-+                                                     --- -+-
  /   |               THE developer of ARM Linux              |+| /|\
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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Sun Feb 20 23:04:30 2000
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>Nope, haven't benchmarked the kernel this side of the millenium yet.

I'd be interested to see a copy of the results next time you do.

p.




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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Sun Feb 20 23:19:36 2000
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Hi,

I am pleased to report that the mailing lists have now been moved onto a
new server and are now running correctly.

The old lists have been disabled, which means that the archives held on
'ftp.arm.linux.org.uk' will be out of date until the FTP site is properly
transferred.

Unfortunately, some of the archived messages were lost in this move,
which I hope will not cause too many problems for anyone.

I shall look into transferring the FTP site shortly.  Please ensure that
you are using the correct address, namely:

	"ftp.arm.linux.org.uk"

	or

	"ftp.arm.uk.linux.org"

The first address is preferable.  This is especially true for sites mirroring
the main FTP site.
   _____
  |_____| ------------------------------------------------- ---+---+-
  |   |        Russell King       linux@arm.linux.org.uk      --- ---
  | | | |  http://www.arm.linux.org.uk/~rmk/armlinux.html    /  /  |
  | +-+-+                                                     --- -+-
  /   |               THE developer of ARM Linux              |+| /|\
 /  | | |                                                     ---  |
    +-+-+ -------------------------------------------------  /\\\  |

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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Mon Feb 21 06:30:21 2000
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Subject: How to reset the remote_debug mode under SDT for EBSA
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Hi,

I am doing development on the ebsa board under SDT (strongarm development 
tools) now. I encountered a problem: after I use remote_debug mode to download 
the image to the flash ram on the board, if I make some change on the code and 
rebuild the image, I can not download it to the board unless I reboot the 
computer. Does anyone know how to reset the remote_debug mode, then I can 
download the rebuild code without rebooting the machine? Thanks a lot.

Bo


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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Tue Feb 22 14:21:15 2000
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Dear All:

I have problem on building arm tool chain!!

I use the following source, kernel 2.2.14, gcc-2.95.2, 
glibc-2.1.2, binutils-2.9.5.0.27.

I followed the processed proposed by Chris Rutter (Thank you, Chris),
except that I can not find the suitable patch for gcc 2.95.2 and
binutils-2.9.5.0.27.

The gcc and binutils are normally built.
However, when I build the glibc, the make process is out with this error 
"/usr/local/arm/bin/ld: unrecognized emulation mode: elf32arm
Supported emulations: armelf_linux armelf_linux26 armelf"

Could anyone tell me why?

Thanks
 
kirk


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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Wed Feb 23 07:12:09 2000
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> I use the following source, kernel 2.2.14, gcc-2.95.2, 
> glibc-2.1.2, binutils-2.9.5.0.27.
> 
> However, when I build the glibc, the make process is out with this error 
> "/usr/local/arm/bin/ld: unrecognized emulation mode: elf32arm
> Supported emulations: armelf_linux armelf_linux26 armelf"
> 
> George France from the cross-gcc mailing list sent me this hack after I
> stumbled onto this problem:
> 
> Use your favorite editor to modify the gcc file 'specs', to get the correct
> behaviour from gcc, amend the *link section of your specs file as follows:
> 
> *link:
> %{h*} %{version:-v}    %{b} %{Wl,*:%*}    %{static:-Bstatic}
> %{shared:-shared
> }    %{symbolic:-Bsymbolic}    %{rdynamic:-export-dynamic}
> %{!dynamic-linker:
> -dynamic-linker /lib/ld-linux.so.2}    -X    %{mbig-endian:-EB}
> %{mapcs-26:-m ar
> 2)	melf_linux26} %{!mapcs-26:-m armelf_linux} -p
 
  It works!! 
  Thanks a lot!
  However, now I encountered another error on building glibc.
  When it starts to build libdb1.so, arm-linux-gcc just lists
  many "multiple definition of __(variable name like __dummy
  , __gcc_bcmp ...etc)" messages.
  And says that these variables are first defined in libgcc.a !!

  What happened!!?? How shoud I do to avoid these errors??

  Thanks!

  kirk


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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Fri Feb 25 20:44:38 2000
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From: George France <france@crl.dec.com>
To: linux-arm@vger.rutgers.edu, linux-arm-kernel@lists.arm.linux.org.uk
Subject: Binary tar ball of i386 to armv4l (Strong-ARM) Cross Tool Chain a
	vailable for download.
Date: Fri, 25 Feb 2000 15:43:14 -0500
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There have been so many questions and problems on the mailing list about
building a Cross Tool Chain.  We have decided to post a 38 Mbyte binary
(executable) tar-ball here:

	
http://crl.research.compaq.com/projects/personalserver/sw_download.html

it is an arm-linux cross Tool Chain.  The Tool Chain is made up of:

 	binutils-2.9.5.0.22,
	gcc-2.95.2 - C, C++, f77, CHILL, 	java and objc.
 	glibc-2.1.2. with the International crypt library. (THIS IS NOT FOR
EXPORT)

The Tool Chain is compiled for a i386 host with an armv4l target. Armv4 =
the instructions set for the SA-110, SA-1100 and SA-1110 processors. l =
little edian.


Installation notes:

The Tool Chain must be installed in /skiff/local.  It will not work from any
other path.  

The only other problem that you may have with the include files is that the
tar ball was setup for Linux 2.2.14.  You may need to setup a symbolic links
for:

           ln -s /usr/src/linux/include/asm
/skiff/local/arm-linux/include/asm
           ln -s /usr/src/linux/include/linux
/skiff/local/arm-linux/include/linux

or you could copy the /usr/src/linux/include/asm and
/usr/src/linux/include/linux directories to the
/skiff/local/arm-linux/include.  Be certain that you have run 'make
menuconfig' or equivalent, then 'make dep'.  This will verify that your
kernel tree is up-to-date and the correct symbolic links are up-to-date.

This tool chain has glibc symbol versioning.  If you are using a netwinder,
you may have to compile your code with static libs.



If there is interest, we may make a binary i386 to Strong-ARM cross gdb
available for remote debugging.


--George


George France,      france@crl.dec.com
Cambridge Research Laboratory, Compaq Computer Corporation
One Kendall Square, Building 700     MS: CRL
Cambridge, MA 02139 USA



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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Fri Feb 25 21:35:34 2000
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Subject: Re: Binary tar ball of i386 to armv4l (Strong-ARM) Cross Tool Chain a vailable for download.
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On Fri, 25 Feb 2000 15:43:14 -0500, George France wrote:
> There have been so many questions and problems on the mailing list about
> building a Cross Tool Chain.  We have decided to post a 38 Mbyte binary
> (executable) tar-ball here:
> 
>     
> http://crl.research.compaq.com/projects/personalserver/sw_download.html
> 
> it is an arm-linux cross Tool Chain.  The Tool Chain is made up of:
> 
>     binutils-2.9.5.0.22,
>     gcc-2.95.2 - C, C++, f77, CHILL,    java and objc.
>     glibc-2.1.2. with the International crypt library. (THIS IS NOT FOR
> EXPORT)
> 
> The Tool Chain is compiled for a i386 host with an armv4l target. Armv4 =
> the instructions set for the SA-110, SA-1100 and SA-1110 processors. l =
> little edian.

Hmm, it's a little embarrasing for me to tell you that you have been doing
double work. I announced my tarball with almost the same specifications
(only C and C++ as languages) two weeks ago. My toolchain was built from:

  binutils-2.9.5.0.22.tar.bz2
  linux-2.2.13.tar.gz + patch-2.2.13-rmk2.gz + diff-2.2.13-rmk2-np14.gz
  gcc-2.95.2.tar.gz + gcc-2.95.2-diff-991022.gz + chris-rutter-patch-for-gcc-2.95.2
  glibc-2.1.2.tar.bz2 + glibc-crypt-2.1.tar.gz + glibc-linuxthreads-2.1.2.tar.bz2

I only announced it at the linux-arm and sa1100-linux mailing lists, maybe
I should have send the announcement to the linux-arm-kernel mailing list,
too.

My toolchain can be freely downloaded by non-US users (but also by  US
users, of course ;-), because we don't have cryptographic export rules
over here in The Netherlands.

The URL:

  http://www-ict.its.tudelft.nl/~erik/open-source/arm-linux-cross/


Erik

-- 
J.A.K. (Erik) Mouw, Information and Communication Theory Group, Department
of Electrical Engineering, Faculty of Information Technology and Systems,
Delft University of Technology, PO BOX 5031,  2600 GA Delft, The Netherlands
Phone: +31-15-2785859  Fax: +31-15-2781843  Email J.A.K.Mouw@its.tudelft.nl
WWW: http://www-ict.its.tudelft.nl/~erik/
-- 
LART. 250 MIPS under one Watt.
http://www-ict.its.tudelft.nl/~erik/open-source/LART/




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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Sun Feb 27 07:01:15 2000
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Date: Sat, 26 Feb 2000 23:06:55 -0800 (PST)
From: Rob Scott <rscott@mtrob.fdns.net>
To: linux-arm-kernel@lists.arm.linux.org.uk
Subject: Domain specifications
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I need a clue about how the domain field in a process structure is
generated and/or how page/section tables are checked for permission.

The problem I'm trying to solve is when switching tasks via proc-arm6,7.S,
the domain register is written with the value 1d, and the system
eventually hangs solid when an timer interrupt occurs. If the domain
register write is commented out, leaving the value 1f, then the kernel
finishes booting (until the point it can't find a root device, since I
don't have one defined yet).

I'm not sure if the 1d value for the domain register is correct. If it is,
then that means that "Page and section permission bits are checked",
according to "ARM System Architecture". If I'm reading the source
correctly, that means that the user memory is being checked. So, my guess
is that the page permissions aren't being set correctly, and I don't know
where to look to check this. Perhaps I'm missing something in my
processor specific includes??

Thanks in advance for any hints!

Rob Scott



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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Sun Feb 27 09:25:51 2000
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From: Russell King - ARM Linux Admin <linux@arm.linux.org.uk>
Message-Id: <200002270916.JAA05589@flint.arm.linux.org.uk>
Subject: Re: Domain specifications
To: rscott@mtrob.fdns.net (Rob Scott)
Date: Sun, 27 Feb 2000 09:16:56 +0000 (GMT)
Cc: linux-arm-kernel@lists.arm.linux.org.uk
In-Reply-To: <Pine.LNX.4.10.10002262253410.2084-100000@fire.light.com> from "Rob Scott" at Feb 26, 2000 11:06:55 PM
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Rob Scott writes:
> The problem I'm trying to solve is when switching tasks via proc-arm6,7.S,
> the domain register is written with the value 1d, and the system

1d is one of the expected values that is written to the domain register
from any task that is not going to access 'kernel' data:

     1   d
    01 11 01
     |  |  \- user domain			(client)
     |  \---- kernel and page table domain	(manager)
     \------- IO domain				(client)

The page tables are setup such that virtual page0 (with the machine
exception vectors in) is write-protected from SVC mode (since the user
domain is set to client).  This relies on the 'S' bit in the control
register to be set, but the 'R' bit to be clear.

> eventually hangs solid when an timer interrupt occurs. If the domain
> register write is commented out, leaving the value 1f, then the kernel
> finishes booting (until the point it can't find a root device, since I
> don't have one defined yet).

That sounds like virtual page0 is being unmapped by something, or the control
register is getting corrupted, and causing the meaning of one combination
of permission bits to mean "inaccessible" rather than "write protected".

Could you supply details of which kernel version, and the exact processor
type you are experiencing this problem with please?

> Perhaps I'm missing something in my processor specific includes??

Have you changed them?
   _____
  |_____| ------------------------------------------------- ---+---+-
  |   |        Russell King       linux@arm.linux.org.uk      --- ---
  | | | |  http://www.arm.linux.org.uk/~rmk/armlinux.html    /  /  |
  | +-+-+                                                     --- -+-
  /   |               THE developer of ARM Linux              |+| /|\
 /  | | |                                                     ---  |
    +-+-+ -------------------------------------------------  /\\\  |

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Date: Sun, 27 Feb 2000 08:08:43 -0800 (PST)
From: Rob Scott <rscott@mtrob.fdns.net>
To: Russell King - ARM Linux Admin <linux@arm.linux.org.uk>
cc: linux-arm-kernel@lists.arm.linux.org.uk
Subject: Re: Domain specifications
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On Sun, 27 Feb 2000, Russell King - ARM Linux Admin wrote:

> Rob Scott writes:
> > The problem I'm trying to solve is when switching tasks via proc-arm6,7.S,
> > the domain register is written with the value 1d, and the system
> 
> 1d is one of the expected values that is written to the domain register
> from any task that is not going to access 'kernel' data:
> 
>      1   d
>     01 11 01
>      |  |  \- user domain			(client)
>      |  \---- kernel and page table domain	(manager)
>      \------- IO domain				(client)
> 
> The page tables are setup such that virtual page0 (with the machine
> exception vectors in) is write-protected from SVC mode (since the user
> domain is set to client).  This relies on the 'S' bit in the control
> register to be set, but the 'R' bit to be clear.
> 

Thanks for the explaination! It's good to know that 1d is correct...

> > eventually hangs solid when an timer interrupt occurs. If the domain
> > register write is commented out, leaving the value 1f, then the kernel
> > finishes booting (until the point it can't find a root device, since I
> > don't have one defined yet).
> 
> That sounds like virtual page0 is being unmapped by something, or the control
> register is getting corrupted, and causing the meaning of one combination
> of permission bits to mean "inaccessible" rather than "write protected".

Humm - I'm assuming that this would cause some sort of MMU fault, but no
error message is generated...

> 
> Could you supply details of which kernel version, and the exact processor
> type you are experiencing this problem with please?

The base kernel is 2.2.14, patched to rmk3. I've been adding code for my
processor, which is an ARM720T. It's embedded in a LinkUp Systems L7200. 
> 
> > Perhaps I'm missing something in my processor specific includes??
> 
> Have you changed them?

Actually, since this is a new processor type, I've had to create them.
I've used bits from arch-rpc and arch-ebsa100.

Thanks,
Rob


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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Sun Feb 27 16:53:56 2000
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Subject: Re: Domain specifications
To: rscott@mtrob.fdns.net (Rob Scott)
Date: Sun, 27 Feb 2000 16:52:14 +0000 (GMT)
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Rob Scott writes:
> > That sounds like virtual page0 is being unmapped by something, or the control
> > register is getting corrupted, and causing the meaning of one combination
> > of permission bits to mean "inaccessible" rather than "write protected".
> 
> Humm - I'm assuming that this would cause some sort of MMU fault, but no
> error message is generated...

Unfortunately, if the first page goes amiss, then no error message can be
generated - this page contains the machine exception vectors, so you
end up getting stuck in the prefetch abort vector.  (the processor tries
to fetch an instruction from the exception vectors, and prefetch aborts
ad infinitum).
   _____
  |_____| ------------------------------------------------- ---+---+-
  |   |        Russell King       linux@arm.linux.org.uk      --- ---
  | | | |  http://www.arm.linux.org.uk/~rmk/armlinux.html    /  /  |
  | +-+-+                                                     --- -+-
  /   |               THE developer of ARM Linux              |+| /|\
 /  | | |                                                     ---  |
    +-+-+ -------------------------------------------------  /\\\  |

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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Sun Feb 27 18:12:16 2000
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Subject: assembler tweaks
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Date: Sun, 27 Feb 2000 18:03:09 +0000
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Here is a small patch containing some assembler optimizations:

1. Replace STM with STR where appropriate
2. No point including the WFS-ignorer if NWFPE is built in.
3. No point zeroing R10 on entry to the kernel if -fomit-frame-pointer is in 
use.

PATCH FOLLOWS

diff -udpNr rmk/linux/arch/arm/lib/findbit.S linux-000227/arch/arm/lib/findbit.S
--- rmk/linux/arch/arm/lib/findbit.S	Mon Feb  7 21:22:51 2000
+++ linux-000227/arch/arm/lib/findbit.S	Fri Jan 14 22:28:51 2000
@@ -53,10 +53,10 @@ ENTRY(find_next_zero_bit)
 		beq	Lfindzbit1lp		@ If new byte, goto old routine
 		ldrb	r3, [r0, r2, lsr#3]
 		orr	r3, r3, #0xFF00		@ Set top bits so we wont get confused
-		stmfd	sp!, {r4}
+		str	r4, [sp, #-4]!
 		and	r4, r2, #7
 		mov	r3, r3, lsr r4		@ Shift right by no. of bits
-		ldmfd	sp!, {r4}
+		ldr	r4, [sp], #4
 		and	r3, r3, #0xFF
 		teq	r3, #0xFF
 		orreq	r2, r2, #7
diff -udpNr rmk/linux/arch/arm/lib/strrchr.S linux-000227/arch/arm/lib/strrchr.S
--- rmk/linux/arch/arm/lib/strrchr.S	Mon Feb  7 21:22:51 2000
+++ linux-000227/arch/arm/lib/strrchr.S	Sun Feb 27 17:24:32 2000
@@ -12,7 +12,7 @@
 
 		.text
 ENTRY(strrchr)
-		stmfd	sp!, {lr}
+		str	lr, [sp, #-4]!
 		mov	r3, #0
 1:		ldrb	r2, [r0], #1
 		teq	r2, r1
diff -udpNr rmk/linux/arch/arm/kernel/entry-armo.S linux-000227/arch/arm/kernel/entry-armo.S
--- rmk/linux/arch/arm/kernel/entry-armo.S	Mon Feb  7 21:22:51 2000
+++ linux-000227/arch/arm/kernel/entry-armo.S	Sun Jan  9 16:16:18 2000
@@ -22,6 +22,7 @@
  * adhering to the above criteria.
  */
 #include <linux/linkage.h>
+#include <linux/config.h>
 
 #include <asm/assembler.h>
 #include <asm/errno.h>
@@ -79,6 +80,12 @@
 #define S_R1		4
 #define S_R0		0
 
+#ifdef CONFIG_FRAME_POINTER
+#define	zero_frame	mov	fp, #0
+#else
+#define zero_frame
+#endif
+
 #ifdef IOC_BASE
 /* IOC / IOMD based hardware */
 		.equ	ioc_base_high, IOC_BASE & 0xff000000
@@ -213,7 +220,7 @@ irq_prio_h:	.byte	 0, 8, 9, 8,10,10,10,1
 		stmfd	sp!, {r0 - r12}		;\
 		mov	r0, #-1			;\
 		str	r0, [sp, #S_OLD_R0]	;\
-		mov	fp, #0
+		zero_frame
 
 #define SVC_IRQ_SAVE_ALL			\
 		str	sp, [sp, #-16]!		;\
@@ -224,7 +231,7 @@ irq_prio_h:	.byte	 0, 8, 9, 8,10,10,10,1
 		stmfd	sp!, {r0 - r12}		;\
 		mov	r0, #-1			;\
 		str	r0, [sp, #S_OLD_R0]	;\
-		mov	fp, #0
+		zero_frame
 
 #define SVC_RESTORE_ALL				\
 		ldmfd	sp, {r0 - pc}^
@@ -261,7 +268,7 @@ vector_undefinstr:
 		tst	lr,#3
 		bne	__und_svc
 		save_user_regs
-		mov	fp, #0
+		zero_frame
 		teqp	pc, #I_BIT | MODE_SVC
 .Lbug_undef:
 		ldr	r4, .LC2
@@ -283,6 +290,10 @@ __und_svc:	SVC_SAVE_ALL				@ Non-user mo
 		bl	SYMBOL_NAME(do_undefinstr)
 		SVC_RESTORE_ALL
 
+#ifdef CONFIG_NWFPE
+		/* The FPE is always present */
+		.equ	fpe_not_present, 0
+#else
 /* We get here if an undefined instruction happens and the floating
  * point emulator is not present.  If the offending instruction was
  * a WFS, we just perform a normal return as if we had emulated the
@@ -319,6 +330,7 @@ wfs_mask_data:	.word	0x0e200110			@ WFS/
 		.word	0x0d0d0100			@ LDF [sp]/STF [sp]
 		.word	0x0d0b0100			@ LDF [fp]/STF [fp]
 		.word	0x0f0f0f00
+#endif
 
 .LC2:		.word	SYMBOL_NAME(fp_enter)
 
@@ -686,7 +698,7 @@ ENTRY(__switch_to)
 /*
  * initialise the trap system
  */
-ENTRY(trap_init)
+ENTRY(__trap_init)
 		stmfd	sp!, {r4 - r7, lr}
 		adr	r1, .Ljump_addresses
 		ldmia	r1, {r1 - r7, ip, lr}
diff -udpNr rmk/linux/arch/arm/kernel/entry-armv.S linux-000227/arch/arm/kernel/entry-armv.S
--- rmk/linux/arch/arm/kernel/entry-armv.S	Mon Feb  7 21:22:51 2000
+++ linux-000227/arch/arm/kernel/entry-armv.S	Sat Jan 15 10:56:26 2000
@@ -68,6 +68,12 @@
 
 #define OFF_CR_ALIGNMENT(x)	cr_alignment - x
 
+#ifdef CONFIG_FRAME_POINTER
+#define	zero_frame	mov	fp, #0
+#else
+#define zero_frame
+#endif
+
 #ifdef IOC_BASE
 /* IOC / IOMD based hardware */
 #include <asm/iomd.h>
@@ -421,7 +546,7 @@ __und_invalid:	sub	sp, sp, #S_FRAME_SIZE
 		ldr	r4, .LCund
 		mov	r1, #BAD_UNDEFINSTR		@ int reason
 
-1:		mov	fp, #0
+1:		zero_frame
 		ldmia	r4, {r5 - r7}			@ Get XXX pc, cpsr, old_r0
 		add	r4, sp, #S_PC
 		stmia	r4, {r5 - r7}			@ Save XXX pc, cpsr, old_r0
@@ -688,11 +821,11 @@ t:		.ascii "Prefetch -> undefined instru
 ENTRY(__switch_to)
 		stmfd	sp!, {r4 - sl, fp, lr}		@ Store most regs on stack
 		mrs	ip, cpsr
-		stmfd	sp!, {ip}			@ Save cpsr_SVC
+		str	ip, [sp, #-4]!			@ Save cpsr_SVC
 		str	sp, [r0, #TSS_SAVE]		@ Save sp_SVC
 		ldr	sp, [r1, #TSS_SAVE]		@ Get saved sp_SVC
 		ldr	r2, [r1, #TSS_DOMAIN]
-		ldmfd	sp!, {ip}
+		ldr	ip, [sp], #4
 		mcr	p15, 0, r2, c3, c0		@ Set domain register
 		msr	spsr, ip			@ Save tasks CPSR into SPSR for this return
 		ldmfd	sp!, {r4 - sl, fp, pc}^		@ Load all regs saved previously
diff -udpNr rmk/linux/arch/arm/kernel/entry-common.S linux-000227/arch/arm/kernel/entry-common.S
--- rmk/linux/arch/arm/kernel/entry-common.S	Sun Feb 20 14:10:43 2000
+++ linux-000227/arch/arm/kernel/entry-common.S	Sun Feb 27 15:29:10 2000
@@ -85,7 +76,7 @@ tip		.req	r7			@ temporary IP
 		.align	5
 vector_swi:	save_user_regs
 		mask_pc	lr, lr
-		mov	fp, #0
+		zero_frame
 		ldr	scno, [lr, #-4]		@ get SWI instruction
 		arm700_bug_check scno, ip
 #ifdef CONFIG_ALIGNMENT_TRAP



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Subject: system call changes
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Date: Sun, 27 Feb 2000 18:19:41 +0000
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Currently the system call entry path is set up to directly handle functions 
with up to six arguments.  This is wasteful because there is only one, 
comparatively rare, system call that actually uses all six arguments; all 
the others are forced to push a useless word onto the stack.

This patch reworks things so that only a single word of arguments is pushed in 
the standard entry veneer; sys_mmap2 is implemented in assembler so it can 
sort its own arguments out.  The other place that has to change is 
sys_syscall, which fortuitously ends up a cycle or two faster as well.

I'd be interested to hear thoughts on this.

PATCH FOLLOWS

--- rmk/linux/arch/arm/kernel/entry-common.S	Sun Feb 20 14:10:43 2000
+++ armlinux/arch/arm/kernel/entry-common.S	Sun Feb 27 18:03:26 2000
@@ -4,16 +4,6 @@
  */
 
 #define S_OFF		8
-#define SYSCALL_REGS	r4, r5
-
-/*
- * Define to favour ARM8, ARM9 and StrongARM cpus.  This says that it is
- * cheaper to use two LDR instructions than a two-register LDM, if the
- * latter would entail calculating an address specially.
- */
-#if defined(CONFIG_CPU_SA110)
-#define HARVARD_CACHE
-#endif
 
 		.macro	get_softirq, rd
 #ifdef __SMP__
@@ -95,9 +85,7 @@
 #endif
 		enable_irqs ip
 
-		stmdb	sp!, {SYSCALL_REGS}	@ new style: (r0 = arg1, r4 = arg5, r5 = arg6)
-						@ Note that we dont have to handle
-						@ sys_syscalls arg7 here
+		str	r4, [sp, #-S_OFF]!	@ push fifth arg
 		adrsvc	al, lr, fast_syscall_return
 
 		bic	scno, scno, #0xff000000	@ mask off SWI op-code
@@ -141,10 +129,11 @@
 		b	SYMBOL_NAME(deferred)
 
 		.align	5
-
+		.type	__softirq_state, %object
 __softirq_state:
 		.word	SYMBOL_NAME(softirq_state)
 
+		.type	sys_call_table, %object
 ENTRY(sys_call_table)
 #include "calls.S"
 
@@ -153,15 +142,17 @@
  */
 @ r0 = syscall number
 @ r5 = syscall table
+		.type	sys_syscall, %function
 SYMBOL_NAME(sys_syscall):
 		eor	scno, r0, #OS_NUMBER << 20
 		cmp	scno, #NR_syscalls	@ check range
-		add	ip, sp, #S_OFF
-		ldmleib	ip, {r0 - r3, SYSCALL_REGS}	@ get our args
-		stmleia	sp, {SYSCALL_REGS}	@ Put our arg on the stack
+		stmleia	sp, {r5, r6}		@ shuffle args
+		movle	r0, r1
+		movle	r1, r2
+		movle	r2, r3
+		movle	r3, r4
 		ldrle	pc, [tbl, scno, lsl #2]
-		mov	r0, #-ENOSYS
-		RETINSTR(mov,pc,lr)
+		b	sys_ni_syscall
 
 sys_fork_wrapper:
 		add	r0, sp, #S_OFF
@@ -198,6 +189,23 @@
 sys_sigaltstack_wrapper:
 		ldr	r2, [sp, #S_OFF + S_SP]
 		b	do_sigaltstack
+
+/*
+ * Note: off_4k is always units of 4K.  If we can't do the requested
+ * offset, we return EINVAL.
+ */
+sys_mmap2:
+#if PAGE_SHIFT > 12
+		tst	r5, #PGOFF_MASK
+		moveq	r5, r5, lsr #PGOFF_SHIFT
+		streq	r5, [sp, #4]
+		beq	do_mmap2
+		mov	r0, #-EINVAL
+		mov	pc, lr
+#else
+		str	r5, [sp, #4]
+		b	do_mmap2
+#endif
 
 		.data
 
diff -udpNr rmk/linux/arch/arm/kernel/sys_arm.c linux-000227/arch/arm/kernel/sys_arm.c
--- rmk/linux/arch/arm/kernel/sys_arm.c	Mon Feb  7 21:23:42 2000
+++ linux-000227/arch/arm/kernel/sys_arm.c	Mon Feb  7 22:02:55 2000
@@ -50,7 +50,7 @@ asmlinkage int sys_pipe(unsigned long * 
 }
 
 /* common code for old and new mmaps */
-static inline long do_mmap2(
+long int do_mmap2(
 	unsigned long addr, unsigned long len,
 	unsigned long prot, unsigned long flags,
 	unsigned long fd, unsigned long pgoff)
@@ -77,27 +77,6 @@ static inline long do_mmap2(
 		fput(file);
 out:
 	return error;
-}
-
-#define PGOFF_SHIFT (PAGE_SHIFT - 12)
-#define PGOFF_MASK  (~((1 << PGOFF_SHIFT) - 1))
-
-/*
- * Note: off_4k is always units of 4K.  If we can't do the requested
- * offset, we return EINVAL.
- */
-asmlinkage long
-sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
-	  unsigned long flags, unsigned long fd, unsigned long off_4k)
-{
-	unsigned long pgoff;
-
-	if (off_4k & ~PGOFF_MASK)
-		return -EINVAL;
-
-	pgoff = off_4k >> PGOFF_SHIFT;
-
-	return do_mmap2(addr, len, prot, flags, fd, pgoff);
 }
 
 struct mmap_arg_struct {





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From owner-linux-arm-kernel@lists.arm.linux.org.uk  Sun Feb 27 20:47:09 2000
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To: Russell King <rmk@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.arm.linux.org.uk
Subject: Re: Patch received: system call changes 
In-Reply-To: Message from Russell King <rmk@arm.linux.org.uk> 
   of "Sun, 27 Feb 2000 20:40:33 GMT." <200002272040.UAA08130@raistlin.arm.linux.org.uk> 
References: <200002272040.UAA08130@raistlin.arm.linux.org.uk> 
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Date: Sun, 27 Feb 2000 20:45:18 +0000
From: Philip Blundell <Philip.Blundell@pobox.com>
Message-Id: <E12PAZ4-0000Hq-00@kings-cross.london.uk.eu.org>
Sender: owner-linux-arm-kernel@lists.arm.linux.org.uk
Precedence: bulk

>You're missing definitions for PGOFF_MASK and PGOFF_SHIFT

Oh yes, sorry.

p.

diff -udpNr rmk/linux/arch/arm/lib/getconsdata.c linux-000227/arch/arm/lib/getconsdata.c
--- rmk/linux/arch/arm/lib/getconsdata.c	Mon Feb  7 21:22:51 2000
+++ linux-000227/arch/arm/lib/getconsdata.c	Sat Jan 15 22:53:34 2000
@@ -91,3 +91,6 @@ unsigned long PAGE_SZ = PAGE_SIZE;
 unsigned long KSWI_BASE = 0x900000;
 unsigned long KSWI_SYS_BASE = 0x9f0000;
 unsigned long SYS_ERROR0 = 0x9f0000;
+
+unsigned long PGOFF_SHIFT = (PAGE_SHIFT - 12);
+unsigned long PGOFF_MASK = ((1 << (PAGE_SHIFT - 12)) - 1);




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