Subject: Domain specifications

From: Rob Scott <[email-masked]>
Date: Sat, 26 Feb 2000 23:06:55 -0800 (PST)

I need a clue about how the domain field in a process structure is
generated and/or how page/section tables are checked for permission.

The problem I'm trying to solve is when switching tasks via proc-arm6,7.S,
the domain register is written with the value 1d, and the system
eventually hangs solid when an timer interrupt occurs. If the domain
register write is commented out, leaving the value 1f, then the kernel
finishes booting (until the point it can't find a root device, since I
don't have one defined yet).

I'm not sure if the 1d value for the domain register is correct. If it is,
then that means that "Page and section permission bits are checked",
according to "ARM System Architecture". If I'm reading the source
correctly, that means that the user memory is being checked. So, my guess
is that the page permissions aren't being set correctly, and I don't know
where to look to check this. Perhaps I'm missing something in my
processor specific includes??

Thanks in advance for any hints!

Rob Scott

unsubscribe: body of `unsubscribe linux-arm-kernel' to [email-masked]

---

From: Russell King - ARM Linux Admin <[email-masked]>
Date: Sun, 27 Feb 2000 09:16:56 +0000 (GMT)

> the domain register is written with the value 1d, and the system

1d is one of the expected values that is written to the domain register
from any task that is not going to access 'kernel' data:

     1   d
    01 11 01
     |  |  \- user domain			(client)
     |  \---- kernel and page table domain	(manager)
     \------- IO domain				(client)

The page tables are setup such that virtual page0 (with the machine
exception vectors in) is write-protected from SVC mode (since the user
domain is set to client).  This relies on the 'S' bit in the control
register to be set, but the 'R' bit to be clear.

> don't have one defined yet).

That sounds like virtual page0 is being unmapped by something, or the control
register is getting corrupted, and causing the meaning of one combination
of permission bits to mean "inaccessible" rather than "write protected".

Could you supply details of which kernel version, and the exact processor
type you are experiencing this problem with please?

> Perhaps I'm missing something in my processor specific includes??

Have you changed them?
   _____
  |_____| ------------------------------------------------- ---+---+-
  |   |        Russell King       [email-masked]      --- ---
  | | | |  http://www.arm.linux.org.uk/~rmk/armlinux.html    /  /  |
  | +-+-+                                                     --- -+-
  /   |               THE developer of ARM Linux              |+| /|\
 /  | | |                                                     ---  |
    +-+-+ -------------------------------------------------  /\\\  |

---

From: Rob Scott <[email-masked]>
Date: Sun, 27 Feb 2000 08:08:43 -0800 (PST)

> register to be set, but the 'R' bit to be clear.

Thanks for the explaination! It's good to know that 1d is correct...

> of permission bits to mean "inaccessible" rather than "write protected".

Humm - I'm assuming that this would cause some sort of MMU fault, but no
error message is generated...

> type you are experiencing this problem with please?

The base kernel is 2.2.14, patched to rmk3. I've been adding code for my
processor, which is an ARM720T. It's embedded in a LinkUp Systems L7200. 
> > Perhaps I'm missing something in my processor specific includes??

Actually, since this is a new processor type, I've had to create them.
I've used bits from arch-rpc and arch-ebsa100.

Thanks,
Rob

---

From: Russell King - ARM Linux Admin <[email-masked]>
Date: Sun, 27 Feb 2000 16:52:14 +0000 (GMT)

> error message is generated...

Unfortunately, if the first page goes amiss, then no error message can be
generated - this page contains the machine exception vectors, so you
end up getting stuck in the prefetch abort vector.  (the processor tries
to fetch an instruction from the exception vectors, and prefetch aborts
ad infinitum).
   _____
  |_____| ------------------------------------------------- ---+---+-
  |   |        Russell King       [email-masked]      --- ---
  | | | |  http://www.arm.linux.org.uk/~rmk/armlinux.html    /  /  |
  | +-+-+                                                     --- -+-
  /   |               THE developer of ARM Linux              |+| /|\
 /  | | |                                                     ---  |
    +-+-+ -------------------------------------------------  /\\\  |