Subject: assembler tweaks

From: Philip Blundell <[email-masked]>
Date: Sun, 27 Feb 2000 18:03:09 +0000

Here is a small patch containing some assembler optimizations:

1. Replace STM with STR where appropriate
2. No point including the WFS-ignorer if NWFPE is built in.
3. No point zeroing R10 on entry to the kernel if -fomit-frame-pointer is in 
use.

PATCH FOLLOWS

diff -udpNr rmk/linux/arch/arm/lib/findbit.S linux-000227/arch/arm/lib/findbit.S
--- rmk/linux/arch/arm/lib/findbit.S	Mon Feb  7 21:22:51 2000
+++ linux-000227/arch/arm/lib/findbit.S	Fri Jan 14 22:28:51 2000
@@ -53,10 +53,10 @@ ENTRY(find_next_zero_bit)
 		beq	Lfindzbit1lp		@ If new byte, goto old routine
 		ldrb	r3, [r0, r2, lsr#3]
 		orr	r3, r3, #0xFF00		@ Set top bits so we wont get confused
-		stmfd	sp!, {r4}
+		str	r4, [sp, #-4]!
 		and	r4, r2, #7
 		mov	r3, r3, lsr r4		@ Shift right by no. of bits
-		ldmfd	sp!, {r4}
+		ldr	r4, [sp], #4
 		and	r3, r3, #0xFF
 		teq	r3, #0xFF
 		orreq	r2, r2, #7
diff -udpNr rmk/linux/arch/arm/lib/strrchr.S linux-000227/arch/arm/lib/strrchr.S
--- rmk/linux/arch/arm/lib/strrchr.S	Mon Feb  7 21:22:51 2000
+++ linux-000227/arch/arm/lib/strrchr.S	Sun Feb 27 17:24:32 2000
@@ -12,7 +12,7 @@
 
 		.text
 ENTRY(strrchr)
-		stmfd	sp!, {lr}
+		str	lr, [sp, #-4]!
 		mov	r3, #0
 1:		ldrb	r2, [r0], #1
 		teq	r2, r1
diff -udpNr rmk/linux/arch/arm/kernel/entry-armo.S linux-000227/arch/arm/kernel/entry-armo.S
--- rmk/linux/arch/arm/kernel/entry-armo.S	Mon Feb  7 21:22:51 2000
+++ linux-000227/arch/arm/kernel/entry-armo.S	Sun Jan  9 16:16:18 2000
@@ -22,6 +22,7 @@
  * adhering to the above criteria.
  */
 #include <linux/linkage.h>
+#include <linux/config.h>
 
 #include <asm/assembler.h>
 #include <asm/errno.h>
@@ -79,6 +80,12 @@
 #define S_R1		4
 #define S_R0		0
 
+#ifdef CONFIG_FRAME_POINTER
+#define	zero_frame	mov	fp, #0
+#else
+#define zero_frame
+#endif
+
 #ifdef IOC_BASE
 /* IOC / IOMD based hardware */
 		.equ	ioc_base_high, IOC_BASE & 0xff000000
@@ -213,7 +220,7 @@ irq_prio_h:	.byte	 0, 8, 9, 8,10,10,10,1
 		stmfd	sp!, {r0 - r12}		;\
 		mov	r0, #-1			;\
 		str	r0, [sp, #S_OLD_R0]	;\
-		mov	fp, #0
+		zero_frame
 
 #define SVC_IRQ_SAVE_ALL			\
 		str	sp, [sp, #-16]!		;\
@@ -224,7 +231,7 @@ irq_prio_h:	.byte	 0, 8, 9, 8,10,10,10,1
 		stmfd	sp!, {r0 - r12}		;\
 		mov	r0, #-1			;\
 		str	r0, [sp, #S_OLD_R0]	;\
-		mov	fp, #0
+		zero_frame
 
 #define SVC_RESTORE_ALL				\
 		ldmfd	sp, {r0 - pc}^
@@ -261,7 +268,7 @@ vector_undefinstr:
 		tst	lr,#3
 		bne	__und_svc
 		save_user_regs
-		mov	fp, #0
+		zero_frame
 		teqp	pc, #I_BIT | MODE_SVC
 .Lbug_undef:
 		ldr	r4, .LC2
@@ -283,6 +290,10 @@ __und_svc:	SVC_SAVE_ALL				@ Non-user mo
 		bl	SYMBOL_NAME(do_undefinstr)
 		SVC_RESTORE_ALL
 
+#ifdef CONFIG_NWFPE
+		/* The FPE is always present */
+		.equ	fpe_not_present, 0
+#else
 /* We get here if an undefined instruction happens and the floating
  * point emulator is not present.  If the offending instruction was
  * a WFS, we just perform a normal return as if we had emulated the
@@ -319,6 +330,7 @@ wfs_mask_data:	.word	0x0e200110			@ WFS/
 		.word	0x0d0d0100			@ LDF [sp]/STF [sp]
 		.word	0x0d0b0100			@ LDF [fp]/STF [fp]
 		.word	0x0f0f0f00
+#endif
 
 .LC2:		.word	SYMBOL_NAME(fp_enter)
 
@@ -686,7 +698,7 @@ ENTRY(__switch_to)
 /*
  * initialise the trap system
  */
-ENTRY(trap_init)
+ENTRY(__trap_init)
 		stmfd	sp!, {r4 - r7, lr}
 		adr	r1, .Ljump_addresses
 		ldmia	r1, {r1 - r7, ip, lr}
diff -udpNr rmk/linux/arch/arm/kernel/entry-armv.S linux-000227/arch/arm/kernel/entry-armv.S
--- rmk/linux/arch/arm/kernel/entry-armv.S	Mon Feb  7 21:22:51 2000
+++ linux-000227/arch/arm/kernel/entry-armv.S	Sat Jan 15 10:56:26 2000
@@ -68,6 +68,12 @@
 
 #define OFF_CR_ALIGNMENT(x)	cr_alignment - x
 
+#ifdef CONFIG_FRAME_POINTER
+#define	zero_frame	mov	fp, #0
+#else
+#define zero_frame
+#endif
+
 #ifdef IOC_BASE
 /* IOC / IOMD based hardware */
 #include <asm/iomd.h>
@@ -421,7 +546,7 @@ __und_invalid:	sub	sp, sp, #S_FRAME_SIZE
 		ldr	r4, .LCund
 		mov	r1, #BAD_UNDEFINSTR		@ int reason
 
-1:		mov	fp, #0
+1:		zero_frame
 		ldmia	r4, {r5 - r7}			@ Get XXX pc, cpsr, old_r0
 		add	r4, sp, #S_PC
 		stmia	r4, {r5 - r7}			@ Save XXX pc, cpsr, old_r0
@@ -688,11 +821,11 @@ t:		.ascii "Prefetch -> undefined instru
 ENTRY(__switch_to)
 		stmfd	sp!, {r4 - sl, fp, lr}		@ Store most regs on stack
 		mrs	ip, cpsr
-		stmfd	sp!, {ip}			@ Save cpsr_SVC
+		str	ip, [sp, #-4]!			@ Save cpsr_SVC
 		str	sp, [r0, #TSS_SAVE]		@ Save sp_SVC
 		ldr	sp, [r1, #TSS_SAVE]		@ Get saved sp_SVC
 		ldr	r2, [r1, #TSS_DOMAIN]
-		ldmfd	sp!, {ip}
+		ldr	ip, [sp], #4
 		mcr	p15, 0, r2, c3, c0		@ Set domain register
 		msr	spsr, ip			@ Save tasks CPSR into SPSR for this return
 		ldmfd	sp!, {r4 - sl, fp, pc}^		@ Load all regs saved previously
diff -udpNr rmk/linux/arch/arm/kernel/entry-common.S linux-000227/arch/arm/kernel/entry-common.S
--- rmk/linux/arch/arm/kernel/entry-common.S	Sun Feb 20 14:10:43 2000
+++ linux-000227/arch/arm/kernel/entry-common.S	Sun Feb 27 15:29:10 2000
@@ -85,7 +76,7 @@ tip		.req	r7			@ temporary IP
 		.align	5
 vector_swi:	save_user_regs
 		mask_pc	lr, lr
-		mov	fp, #0
+		zero_frame
 		ldr	scno, [lr, #-4]		@ get SWI instruction
 		arm700_bug_check scno, ip
 #ifdef CONFIG_ALIGNMENT_TRAP

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