Subject: Re: Getting the kernel to boot on the EBSA-285

From: "Dirk Brandewie" <[email-masked]>
Date: Thu, 13 Jan 2000 22:24:46 -0800

Here is the fix for the typo.  I really should have read the post closer
before sending :-(
--Dirk
-----Original Message-----
From: Brandewie, Dirk J <[email-masked]>
To: ARM Kernel list <[email-masked]>
Date: Thursday, January 13, 2000 7:57 PM
Subject: Getting the kernel to boot on the EBSA-285

>BTW I believe there is a bug in arch-ebsa285/uncompress.h
>Line 19 reads "while (DC21285_BASE[6] & 8);"  I think someone meant
>to say "while (DC21285_BASE[6] & 10);" if the code was meant to 
>wait for the transmit FIFO to be un-busy
>
Fixed line should be "while (DC21285_BASE[6] & 0x10);" 

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---

From: Russell King - ARM Linux Admin <[email-masked]>
Date: Mon, 17 Jan 2000 22:38:09 +0000 (GMT)

> Fixed line should be "while (DC21285_BASE[6] & 0x10);" 

Err, I think someone's confused.  The bits in the register are defined
to be:

 2:0	Read as 0
 3	Transmitter busy
 4	Receive FIFO status
 5	Transmit FIFO status
 31:6	Read as 0

Therefore, '8' is correct.
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