Subject: MMU trable

From: Hiroshi Ishii <[email-masked]>
Date: Fri, 26 Nov 1999 11:33:46 +0900

Hello.

I'm trying to port to SA-1110, and I have trouble.

In arch/arm/kernel/head-armv.S

mcr     p15, 0, r0, c1, c0	@ Enable MMU & caches.  In 3 instructions	

When enable MMU, system halt. So, can't 'M' bit enable.
What trouble in it? silicon bugs? 

Can MMU on later(not on this stage)?

Regards;

----
++ Funai Electric R & D Co.,LTD ++
++                Hiroshi Ishii ++

unsubscribe: body of `unsubscribe linux-arm-kernel' to [email-masked]